common: Implement clock::configure_usb().

diff --git a/src/common/clock.rs b/src/common/clock.rs
index 1bebbd1e23eb6463fbd4dac6e71906f9acf063e0..86aa3efb884175e399aa4fe9e9269237f6f3c341 100644 (file)
--- a/src/common/clock.rs
+++ b/src/common/clock.rs
@@ -28,11 +28,18 @@ type Reg32 = register::Register<u32>;
 
 const SIM_BASE: u32 = 0x40047000;
 
+const SIM_SOPT1: u32 = SIM_BASE + 0x0000;
 const SIM_SOPT2: u32 = SIM_BASE + 0x1004;
 
+const SIM_SCGC4: u32 = SIM_BASE + 0x1034;
 const SIM_CLKDIV1: u32 = SIM_BASE + 0x1044;
 
+const SIM_SOPT1_USBREGEN: u32 = 1 << 31;
+
 const SIM_SOPT2_PLLFLLSEL: u32 = 1 << 16;
+const SIM_SOPT2_USBSRC: u32 = 1 << 18;
+
+const SIM_SCGC4_USBOTG: u32 = 1 << 18;
 
 const SIM_CLKDIV1_OUTDIV4_SHIFT: u32 = 16;
 const SIM_CLKDIV1_OUTDIV1_SHIFT: u32 = 28;
@@ -156,3 +163,16 @@ pub unsafe fn configure() {
         v | SIM_SOPT2_PLLFLLSEL
     });
 }
+
+pub unsafe fn configure_usb() {
+    let mut scgc4 = Reg32::new(SIM_SCGC4);
+    scgc4.modify(|v| v & !SIM_SCGC4_USBOTG);
+
+    let mut sopt1 = Reg32::new(SIM_SOPT1);
+    sopt1.modify(|v| v | SIM_SOPT1_USBREGEN);
+
+    let mut sopt2 = Reg32::new(SIM_SOPT2);
+    sopt2.modify(|v| v | SIM_SOPT2_USBSRC);
+
+    scgc4.modify(|v| v | SIM_SCGC4_USBOTG);
+}