2 * Copyright (c) 2019 Tilman Sauerbeck (tilman at code-monkey de)
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sublicense, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
19 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
20 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
21 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 type Reg8 = register::Register<u8>;
27 type Reg32 = register::Register<u32>;
29 const UART_BASE: u32 = 0x4006a000;
31 pub const UART0: u32 = UART_BASE + 0x0000;
32 pub const UART1: u32 = UART_BASE + 0x1000;
33 pub const UART2: u32 = UART_BASE + 0x2000;
35 const SIM_BASE : u32 = 0x40047000;
37 const SIM_SOPT2: u32 = SIM_BASE + 0x1004;
38 const SIM_SCGC4: u32 = SIM_BASE + 0x1034;
40 const SIM_SOPT2_UART0SRC_SHIFT: u32 = 26;
42 const SIM_SCGC4_UART0: u32 = 1 << 10;
43 const SIM_SCGC4_UART1: u32 = 1 << 11;
44 const SIM_SCGC4_UART2: u32 = 1 << 12;
46 const UART_BDH: u32 = 0x00;
47 const UART_BDL: u32 = 0x01;
48 const UART_C2 : u32 = 0x03;
49 const UART_S1 : u32 = 0x04;
50 const UART_D : u32 = 0x07;
51 const UART_C4 : u32 = 0x0a;
52 const UART_C5 : u32 = 0x0b;
54 const UART_S1_RDRF: u8 = 1 << 5;
56 const UART_C2_RE : u8 = 1 << 2;
57 const UART_C2_TE : u8 = 1 << 3;
58 const UART_C2_RIE : u8 = 1 << 5;
60 const UART_C4_OSR_SHIFT: u32 = 0;
61 const UART_C4_OSR_MASK : u8 = 0xf << UART_C4_OSR_SHIFT;
63 const UART_C5_BOTHEDGE : u8 = 1 << 1;
65 pub fn configure(uart: u32) {
66 Reg32::new(SIM_SOPT2).modify(|v| {
69 m &= !(3 << SIM_SOPT2_UART0SRC_SHIFT);
70 m |= 2 << SIM_SOPT2_UART0SRC_SHIFT;
75 Reg32::new(SIM_SCGC4).modify(|v| {
78 } else if uart == UART1 {
80 } else if uart == UART2 {
87 // Before we may mess with the baud rate, we need to disable
88 // both the receiver and the transmitter.
89 Reg8::new(uart + UART_C2).modify(|v| v & !(UART_C2_RE | UART_C2_TE));
92 Reg8::new(uart + UART_BDH).write(0x0);
93 Reg8::new(uart + UART_BDL).write(0x34);
95 // Configure minimum oversampling ratio.
96 Reg8::new(uart + UART_C4).modify(|v| {
99 m &= !UART_C4_OSR_MASK;
100 m |= 3 << UART_C4_OSR_SHIFT;
105 Reg8::new(uart + UART_C5).modify(|v| v | UART_C5_BOTHEDGE);
107 // Enable receiver only (including interrupt).
108 Reg8::new(uart + UART_C2).write(UART_C2_RE | UART_C2_RIE);
112 Reg8::new(uart + UART_S1).write(0xf); // Clear errors.
115 pub fn try_read(uart: u32) -> Option<u8> {
116 let mut uart_s1 = Reg8::new(uart + UART_S1);
118 let s1 = uart_s1.read();
120 let result = if (s1 & UART_S1_RDRF) == 0 {
123 Some(Reg8::new(uart + UART_D).read())
126 let set_error_flags = s1 & 0x1f;
128 // Acknowledge errors.
129 if set_error_flags != 0 {
130 uart_s1.write(set_error_flags);