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(parent: 1c4a9ec) | patch
Add an extra sample to the logic edges so that the end sample is visible
authorJoel Holdsworth <joel@airwebreathe.org.uk>
Sat, 25 Jan 2014 09:51:11 +0000 (09:51 +0000)
committerBert Vermeulen <bert@biot.com>
Sat, 25 Jan 2014 11:54:10 +0000 (12:54 +0100)
commit175d6573de78a10cc4ff461147d26c99ab3847b4
tree379298a9a1245bc4732d97faf4691404989294c6tree | snapshot
parent1c4a9ec1780cf0d0b0e1eaa63292201523e94672commit | diff
Add an extra sample to the logic edges so that the end sample is visible
pv/data/logicsnapshot.cpp diff | blob | history
pv/view/logicsignal.cpp diff | blob | history
test/data/logicsnapshot.cpp diff | blob | history
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