From: Tilman Sauerbeck <tilman@code-monkey.de>
Date: Mon, 17 Jun 2019 06:05:55 +0000 (+0200)
Subject: common: Set SIM_SOPT2.PLLFLLSEL by default.
X-Git-Url: http://git.code-monkey.de/?a=commitdiff_plain;h=c067e78f81f6de7fff6b6a3e1ab1986e2271ff06;p=gps-watch.git

common: Set SIM_SOPT2.PLLFLLSEL by default.

At least the USB peripheral needs this, but probably others do, too.
---

diff --git a/src/common/clock.rs b/src/common/clock.rs
index c1bbb10..1bebbd1 100644
--- a/src/common/clock.rs
+++ b/src/common/clock.rs
@@ -28,8 +28,12 @@ type Reg32 = register::Register<u32>;
 
 const SIM_BASE: u32 = 0x40047000;
 
+const SIM_SOPT2: u32 = SIM_BASE + 0x1004;
+
 const SIM_CLKDIV1: u32 = SIM_BASE + 0x1044;
 
+const SIM_SOPT2_PLLFLLSEL: u32 = 1 << 16;
+
 const SIM_CLKDIV1_OUTDIV4_SHIFT: u32 = 16;
 const SIM_CLKDIV1_OUTDIV1_SHIFT: u32 = 28;
 
@@ -145,4 +149,10 @@ pub unsafe fn configure() {
     switch_to_fbe();
     switch_to_pbe();
     switch_to_pee();
+
+    let mut sopt2 = Reg32::new(SIM_SOPT2);
+
+    sopt2.modify(|v| {
+        v | SIM_SOPT2_PLLFLLSEL
+    });
 }