X-Git-Url: http://git.code-monkey.de/?a=blobdiff_plain;f=src%2Fcommon%2Fclock.rs;h=1189fdd58a45ac49f9de05d39f5ae9c8fc11b4ec;hb=4e82712727981c944f56d4ada62dc54ad8542d94;hp=1bebbd1e23eb6463fbd4dac6e71906f9acf063e0;hpb=c067e78f81f6de7fff6b6a3e1ab1986e2271ff06;p=gps-watch.git diff --git a/src/common/clock.rs b/src/common/clock.rs index 1bebbd1..1189fdd 100644 --- a/src/common/clock.rs +++ b/src/common/clock.rs @@ -28,11 +28,18 @@ type Reg32 = register::Register; const SIM_BASE: u32 = 0x40047000; +const SIM_SOPT1: u32 = SIM_BASE + 0x0000; const SIM_SOPT2: u32 = SIM_BASE + 0x1004; +const SIM_SCGC4: u32 = SIM_BASE + 0x1034; const SIM_CLKDIV1: u32 = SIM_BASE + 0x1044; +const SIM_SOPT1_USBREGEN: u32 = 1 << 31; + const SIM_SOPT2_PLLFLLSEL: u32 = 1 << 16; +const SIM_SOPT2_USBSRC: u32 = 1 << 18; + +const SIM_SCGC4_USBOTG: u32 = 1 << 18; const SIM_CLKDIV1_OUTDIV4_SHIFT: u32 = 16; const SIM_CLKDIV1_OUTDIV1_SHIFT: u32 = 28; @@ -68,11 +75,15 @@ const MCG_S_CLKST_MASK: u8 = 3 << MCG_S_CLKST_SHIFT; const MCG_S_IREFST: u8 = 1 << 4; const MCG_S_LOCK0: u8 = 1 << 6; +const OSC0_CR: u32 = 0x40065000; + +const OSC_CR_ERCLKEN: u8 = 1 << 7; + fn configure_clkdiv() { let mut clkdiv1 = Reg32::new(SIM_CLKDIV1); - clkdiv1.write(1 << SIM_CLKDIV1_OUTDIV4_SHIFT); - clkdiv1.modify(|v| v | (1 << SIM_CLKDIV1_OUTDIV1_SHIFT)); + clkdiv1.write((1 << SIM_CLKDIV1_OUTDIV4_SHIFT) + | (1 << SIM_CLKDIV1_OUTDIV1_SHIFT)); } fn switch_to_fbe() { @@ -156,3 +167,25 @@ pub unsafe fn configure() { v | SIM_SOPT2_PLLFLLSEL }); } + +pub unsafe fn reset() { + switch_to_pbe(); + switch_to_fbe(); +} + +pub unsafe fn enable_osc0() { + Reg8::new(OSC0_CR).write(OSC_CR_ERCLKEN); +} + +pub unsafe fn configure_usb() { + let mut scgc4 = Reg32::new(SIM_SCGC4); + scgc4.modify(|v| v & !SIM_SCGC4_USBOTG); + + let mut sopt1 = Reg32::new(SIM_SOPT1); + sopt1.modify(|v| v | SIM_SOPT1_USBREGEN); + + let mut sopt2 = Reg32::new(SIM_SOPT2); + sopt2.modify(|v| v | SIM_SOPT2_USBSRC); + + scgc4.modify(|v| v | SIM_SCGC4_USBOTG); +}