const MCG_S_IREFST: u8 = 1 << 4;
const MCG_S_LOCK0: u8 = 1 << 6;
+const OSC0_CR: u32 = 0x40065000;
+
+const OSC_CR_ERCLKEN: u8 = 1 << 7;
+
fn configure_clkdiv() {
let mut clkdiv1 = Reg32::new(SIM_CLKDIV1);
});
}
+pub unsafe fn reset() {
+ switch_to_pbe();
+ switch_to_fbe();
+}
+
+pub unsafe fn enable_osc0() {
+ Reg8::new(OSC0_CR).write(OSC_CR_ERCLKEN);
+}
+
pub unsafe fn configure_usb() {
let mut scgc4 = Reg32::new(SIM_SCGC4);
scgc4.modify(|v| v & !SIM_SCGC4_USBOTG);