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SignalBase: Allow checking for logic data directly
[pulseview.git]
/
pv
/
data
/
logicsegment.cpp
diff --git
a/pv/data/logicsegment.cpp
b/pv/data/logicsegment.cpp
index a62d9e2f4dae7bca74e79d5f6ca04a3a6a7f87b0..6350682f95ac2a5ae69e8c11e482fc6212914a67 100644
(file)
--- a/
pv/data/logicsegment.cpp
+++ b/
pv/data/logicsegment.cpp
@@
-19,11
+19,12
@@
#include <extdef.h>
#include <extdef.h>
-#include <
assert.h
>
-#include <
string.h
>
-#include <
stdlib.h
>
+#include <
cassert
>
+#include <
cstring
>
+#include <
cstdlib
>
#include <cmath>
#include <cmath>
+#include "logic.hpp"
#include "logicsegment.hpp"
#include <libsigrokcxx/libsigrokcxx.hpp>
#include "logicsegment.hpp"
#include <libsigrokcxx/libsigrokcxx.hpp>
@@
-34,6
+35,7
@@
using std::max;
using std::min;
using std::pair;
using std::shared_ptr;
using std::min;
using std::pair;
using std::shared_ptr;
+using std::vector;
using sigrok::Logic;
using sigrok::Logic;
@@
-45,13
+47,15
@@
const int LogicSegment::MipMapScaleFactor = 1 << MipMapScalePower;
const float LogicSegment::LogMipMapScaleFactor = logf(MipMapScaleFactor);
const uint64_t LogicSegment::MipMapDataUnit = 64*1024; // bytes
const float LogicSegment::LogMipMapScaleFactor = logf(MipMapScaleFactor);
const uint64_t LogicSegment::MipMapDataUnit = 64*1024; // bytes
-LogicSegment::LogicSegment(shared_ptr<Logic> logic, uint64_t samplerate) :
- Segment(samplerate, logic->unit_size()),
+LogicSegment::LogicSegment(pv::data::Logic& owner, shared_ptr<sigrok::Logic> data,
+ uint64_t samplerate) :
+ Segment(samplerate, data->unit_size()),
+ owner_(owner),
last_append_sample_(0)
{
lock_guard<recursive_mutex> lock(mutex_);
memset(mip_map_, 0, sizeof(mip_map_));
last_append_sample_(0)
{
lock_guard<recursive_mutex> lock(mutex_);
memset(mip_map_, 0, sizeof(mip_map_));
- append_payload(
logic
);
+ append_payload(
data
);
}
LogicSegment::~LogicSegment()
}
LogicSegment::~LogicSegment()
@@
-135,18
+139,27
@@
void LogicSegment::pack_sample(uint8_t *ptr, uint64_t value)
#endif
}
#endif
}
-void LogicSegment::append_payload(shared_ptr<Logic> logic)
+void LogicSegment::append_payload(shared_ptr<
sigrok::
Logic> logic)
{
assert(unit_size_ == logic->unit_size());
assert((logic->data_length() % unit_size_) == 0);
lock_guard<recursive_mutex> lock(mutex_);
{
assert(unit_size_ == logic->unit_size());
assert((logic->data_length() % unit_size_) == 0);
lock_guard<recursive_mutex> lock(mutex_);
- append_samples(logic->data_pointer(),
- logic->data_length() / unit_size_);
+ uint64_t prev_sample_count = sample_count_;
+ uint64_t sample_count = logic->data_length() / unit_size_;
+
+ append_samples(logic->data_pointer(), sample_count);
// Generate the first mip-map from the data
append_payload_to_mipmap();
// Generate the first mip-map from the data
append_payload_to_mipmap();
+
+ if (sample_count > 1)
+ owner_.notify_samples_added(this, prev_sample_count + 1,
+ prev_sample_count + 1 + sample_count);
+ else
+ owner_.notify_samples_added(this, prev_sample_count + 1,
+ prev_sample_count + 1);
}
const uint8_t* LogicSegment::get_samples(int64_t start_sample,
}
const uint8_t* LogicSegment::get_samples(int64_t start_sample,
@@
-163,17
+176,17
@@
const uint8_t* LogicSegment::get_samples(int64_t start_sample,
return get_raw_samples(start_sample, (end_sample-start_sample));
}
return get_raw_samples(start_sample, (end_sample-start_sample));
}
-SegmentLogicDataIterator* LogicSegment::begin_sample_iteration(uint64_t start)
const
+SegmentLogicDataIterator* LogicSegment::begin_sample_iteration(uint64_t start)
{
return (SegmentLogicDataIterator*)begin_raw_sample_iteration(start);
}
{
return (SegmentLogicDataIterator*)begin_raw_sample_iteration(start);
}
-void LogicSegment::continue_sample_iteration(SegmentLogicDataIterator* it, uint64_t increase)
const
+void LogicSegment::continue_sample_iteration(SegmentLogicDataIterator* it, uint64_t increase)
{
Segment::continue_raw_sample_iteration((SegmentRawDataIterator*)it, increase);
}
{
Segment::continue_raw_sample_iteration((SegmentRawDataIterator*)it, increase);
}
-void LogicSegment::end_sample_iteration(SegmentLogicDataIterator* it)
const
+void LogicSegment::end_sample_iteration(SegmentLogicDataIterator* it)
{
Segment::end_raw_sample_iteration((SegmentRawDataIterator*)it);
}
{
Segment::end_raw_sample_iteration((SegmentRawDataIterator*)it);
}
@@
-286,7
+299,7
@@
uint64_t LogicSegment::get_unpacked_sample(uint64_t index) const
}
void LogicSegment::get_subsampled_edges(
}
void LogicSegment::get_subsampled_edges(
-
std::
vector<EdgePair> &edges,
+ vector<EdgePair> &edges,
uint64_t start, uint64_t end,
float min_length, int sig_index)
{
uint64_t start, uint64_t end,
float min_length, int sig_index)
{
@@
-310,7
+323,7
@@
void LogicSegment::get_subsampled_edges(
// Store the initial state
last_sample = (get_unpacked_sample(start) & sig_mask) != 0;
// Store the initial state
last_sample = (get_unpacked_sample(start) & sig_mask) != 0;
- edges.
push_back(pair<int64_t, bool>(index++, last_sample)
);
+ edges.
emplace_back(index++, last_sample
);
while (index + block_length <= end) {
//----- Continue to search -----//
while (index + block_length <= end) {
//----- Continue to search -----//
@@
-364,7
+377,7
@@
void LogicSegment::get_subsampled_edges(
// Slide right and zoom out at the beginnings of mip-map
// blocks until we encounter a change
// Slide right and zoom out at the beginnings of mip-map
// blocks until we encounter a change
- while (
1
) {
+ while (
true
) {
const int level_scale_power =
(level + 1) * MipMapScalePower;
const uint64_t offset =
const int level_scale_power =
(level + 1) * MipMapScalePower;
const uint64_t offset =
@@
-396,7
+409,7
@@
void LogicSegment::get_subsampled_edges(
// Zoom in, and slide right until we encounter a change,
// and repeat until we reach min_level
// Zoom in, and slide right until we encounter a change,
// and repeat until we reach min_level
- while (
1
) {
+ while (
true
) {
assert(mip_map_[level].data);
const int level_scale_power =
assert(mip_map_[level].data);
const int level_scale_power =
@@
-446,7
+459,7
@@
void LogicSegment::get_subsampled_edges(
// Store the final state
const bool final_sample =
(get_unpacked_sample(final_index - 1) & sig_mask) != 0;
// Store the final state
const bool final_sample =
(get_unpacked_sample(final_index - 1) & sig_mask) != 0;
- edges.
push_back(pair<int64_t, bool>(index, final_sample)
);
+ edges.
emplace_back(index, final_sample
);
index = final_index;
last_sample = final_sample;
index = final_index;
last_sample = final_sample;
@@
-455,8
+468,8
@@
void LogicSegment::get_subsampled_edges(
// Add the final state
const bool end_sample = get_unpacked_sample(end) & sig_mask;
if (last_sample != end_sample)
// Add the final state
const bool end_sample = get_unpacked_sample(end) & sig_mask;
if (last_sample != end_sample)
- edges.
push_back(pair<int64_t, bool>(end, end_sample)
);
- edges.
push_back(pair<int64_t, bool>(end + 1, end_sample)
);
+ edges.
emplace_back(end, end_sample
);
+ edges.
emplace_back(end + 1, end_sample
);
}
uint64_t LogicSegment::get_subsample(int level, uint64_t offset) const
}
uint64_t LogicSegment::get_subsample(int level, uint64_t offset) const