#include <utility>
#include <vector>
+#include <QObject>
+
namespace sigrok {
class Logic;
}
namespace pv {
namespace data {
+class Logic;
+
typedef struct {
uint64_t sample_index, chunk_num, chunk_offs;
uint8_t* chunk;
uint8_t* value;
} SegmentLogicDataIterator;
-class LogicSegment : public Segment
+class LogicSegment : public QObject, public Segment
{
+ Q_OBJECT
+
private:
struct MipMapLevel
{
typedef std::pair<int64_t, bool> EdgePair;
public:
- LogicSegment(std::shared_ptr<sigrok::Logic> logic, uint64_t samplerate);
+ LogicSegment(pv::data::Logic& owner, std::shared_ptr<sigrok::Logic> data, uint64_t samplerate);
virtual ~LogicSegment();
const uint8_t* get_samples(int64_t start_sample, int64_t end_sample) const;
- SegmentLogicDataIterator* begin_sample_iteration(uint64_t start) const;
- void continue_sample_iteration(SegmentLogicDataIterator* it, uint64_t increase) const;
- void end_sample_iteration(SegmentLogicDataIterator* it) const;
+ SegmentLogicDataIterator* begin_sample_iteration(uint64_t start);
+ void continue_sample_iteration(SegmentLogicDataIterator* it, uint64_t increase);
+ void end_sample_iteration(SegmentLogicDataIterator* it);
private:
uint64_t unpack_sample(const uint8_t *ptr) const;
static uint64_t pow2_ceil(uint64_t x, unsigned int power);
private:
+ Logic& owner_;
+
struct MipMapLevel mip_map_[ScaleStepCount];
uint64_t last_append_sample_;